4.1-B PCB design ver 1

master
Cole Deck 2 weeks ago
parent 65716f7af0
commit b089c7705b

File diff suppressed because it is too large Load Diff

@ -1,6 +1,6 @@
{
"board": {
"active_layer": 0,
"active_layer": 2,
"active_layer_preset": "All Layers",
"auto_track_width": true,
"hidden_netclasses": [],
@ -17,10 +17,10 @@
},
"selection_filter": {
"dimensions": true,
"footprints": true,
"footprints": false,
"graphics": true,
"keepouts": true,
"lockedItems": true,
"lockedItems": false,
"otherItems": true,
"pads": true,
"text": true,
@ -49,7 +49,7 @@
"conflict_shadows",
"shapes"
],
"visible_layers": "00000000_00000000_0fffffff_ffffffff",
"visible_layers": "ffffffff_ffffffff_ffffffff_ffffffff",
"zone_display_mode": 0
},
"git": {
@ -62,9 +62,42 @@
"version": 5
},
"net_inspector_panel": {
"col_hidden": [],
"col_order": [],
"col_widths": [],
"col_hidden": [
false,
false,
false,
false,
false,
false,
false,
false,
false,
false
],
"col_order": [
0,
1,
2,
3,
4,
5,
6,
7,
8,
9
],
"col_widths": [
162,
147,
91,
67,
91,
91,
91,
71,
91,
91
],
"custom_group_rules": [],
"expanded_rows": [],
"filter_by_net_name": true,
@ -75,7 +108,7 @@
"show_unconnected_nets": false,
"show_zero_pad_nets": false,
"sort_ascending": true,
"sorting_column": -1
"sorting_column": 0
},
"open_jobsets": [],
"project": {

@ -3,14 +3,17 @@
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.09999999999999999,
"copper_line_width": 0.19999999999999998,
"apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"courtyard_line_width": 0.05,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
@ -21,7 +24,7 @@
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_line_width": 0.1,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
@ -66,15 +69,20 @@
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"creepage": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_filters_mismatch": "ignore",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
"hole_to_hole": "error",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
@ -84,9 +92,11 @@
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"mirrored_text_on_front_layer": "warning",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"nonmirrored_text_on_back_layer": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
@ -101,7 +111,9 @@
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_angle": "error",
"track_dangling": "warning",
"track_segment_length": "error",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
@ -111,17 +123,18 @@
},
"rules": {
"max_error": 0.005,
"min_clearance": 0.09999999999999999,
"min_clearance": 0.1,
"min_connection": 0.16,
"min_copper_edge_clearance": 0.19999999999999998,
"min_copper_edge_clearance": 0.2,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.6,
"min_text_thickness": 0.09999999999999999,
"min_text_thickness": 0.1,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.16,
"min_via_annular_width": 0.15,
@ -133,53 +146,89 @@
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onpthpad": true,
"td_onroundshapesonly": false,
"td_onsmdpad": true,
"td_ontrackend": false,
"td_onviapad": true
"td_onvia": true
}
],
"teardrop_parameters": [
{
"td_curve_segcount": 0,
"td_allow_use_two_tracks": true,
"td_curve_segcount": 1,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_allow_use_two_tracks": true,
"td_curve_segcount": 1,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_allow_use_two_tracks": true,
"td_curve_segcount": 1,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
0.0,
0.25,
0.5,
0.76
],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
},
{
"diameter": 1.0,
"drill": 0.5
},
{
"diameter": 1.77,
"drill": 0.71
@ -446,10 +495,20 @@
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 1.0,
"via_drill": 0.5,
"wire_width": 6
},
{
"clearance": 0.2,
"name": "hipwr",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.75,
"via_diameter": 1.77,
"via_drill": 0.71,
"wire_width": 6
"via_drill": 0.7
}
],
"meta": {
@ -457,7 +516,12 @@
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
"netclass_patterns": [
{
"netclass": "hipwr",
"pattern": "+12V"
}
]
},
"pcbnew": {
"last_paths": {

@ -12850,7 +12850,7 @@
)
)
)
(property "Footprint" "Capacitor_THT:C_Rect_L7.0mm_W4.5mm_P5.00mm"
(property "Footprint" "C7:CAP_ECPUA_H3_PAN"
(at 115.2652 157.48 0)
(effects
(font
@ -14778,7 +14778,7 @@
(justify left)
)
)
(property "Footprint" "Package_DIP:DIP-20_W7.62mm_Socket"
(property "Footprint" "Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm"
(at 106.68 199.39 0)
(effects
(font
@ -17721,7 +17721,7 @@
)
)
)
(property "Footprint" "Capacitor_THT:C_Rect_L7.0mm_W4.5mm_P5.00mm"
(property "Footprint" "C7:CAP_ECPUA_H3_PAN"
(at 106.68 178.1048 0)
(effects
(font

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@ -0,0 +1 @@
{"hostname":"USIND1LT0185","username":"CAD05221"}
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